1. Field of the Invention
The present invention relates to a method of forming a contact hole of a semiconductor device and, more particularly, to a method of forming a contact hole of a semiconductor device that can improve characteristics of step coverage of metal and contact resistance.
2. Description of the Prior Art
In general, as the semiconductor device becomes highly integrated, the metal layers are formed as a double or multiple level structure, and size of the contact hole for contact between metal layers becomes smaller. Therefore, the characteristics of the step coverage of metal in the fine contact hole is significantly degraded, whereby there occurs problems of poor contact with the metal layer or degradation of flatness. A conventional method of forming a contact hole of a semiconductor device is described below.
In the conventional method of forming a fine contact hole of a semiconductor device, a lower metal layer and an interlayer insulating layer are sequentially formed on a silicon substrate on which an insulating layer is formed. A portion of the interlayer insulating layer is wet etched to a predetermined depth by a photograph and etching processes using a contact hole mask, and thereafter, a remaining portion of the etched portion of the interlayer insulating layer is dry etched to expose a portion of the lower metal layer. As a result, a fine contact hole is formed. Then, in order to remove an Al.sub.2 O.sub.3 film formed on the surface of the exposed lower metal layer, a high frequency plasma (radio frequency plasma) etching process is performed using an Argon gas and an electric power of 500 W at a pressure of 0.5 mTorr. An upper metal layer is then formed on the entire structure by depositing a metal to bury the fine contact hole. However, the step coverage of the metal becomes poor due to the sharp edge of entrance to the fine contact hole and the high topology so that the contact resistance between the upper and lower metal layers is increased.